High Speed Modified Booth’s Multiplier for Signed and Unsigned Numbers

In this paper, we have designed a signed booth’s multiplier as well as an unsigned booth’s multiplier for 4 bit, 8 bit and 16 bits performing multiplication on signed and unsigned number. The implementation is done through Verilog on xiling12.4 platform which provide diversity in calculating the various parameters. The unsigned booth multiplication is implemented by doing some modification in the booth’s multiplication algorithm. In this paper we have tried to explain the modification done in booth’s algorithm for signed and unsigned numbers by dividing it in to five steps. The array structures of signed and unsigned multipliers obtained from RTL Synthesis are shown. Different parameters like Power, CPU Usage, simulation etc have been compared for both signed and unsigned multipliers. Keywords-verilog; booth; signed multiplier; unsigned multiplier